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| ? 2009 microchip technology inc. ds21881e-page 1 mcp6231/1r/1u/2/4 features gain bandwidth product: 300 khz (typical) supply current: i q = 20 a (typical) supply voltage: 1.8v to 6.0v rail-to-rail input/output extended temperature range: -40c to +125c available in 5-pin sc70 and sot-23 packages applications automotive portable equipment transimpedance amplifiers analog filters notebooks and pdas battery-powered systems design aids spice macro models filterlab ? software mindi? circuit designer & simulator microchip advanced part selector (maps) analog demonstration and evaluation boards application notes typical application description the microchip technology inc. mcp6231/1r/1u/2/4 operational amplifiers (op amps) provide wide bandwidth for the quiescent current. the mcp6231/1r/ 1u/2/4 family has a 300 khz gain bandwidth product and 65c (typical) phase margin. this family operates from a single supply voltage as low as 1.8v, while drawing 20 a (typical) quiescent current. in addition, the mcp6231/1r/1u/2/4 family supports rail-to-rail input and output swing, with a common mode input voltage range of v dd +300mv to v ss C300mv. these op amps are designed in one of microchips advanced cmos processes. package types mcp6231 v out v in2 C + v in1 r g2 r g1 r f r z v dd r x r y summing amplif ier circuit 4 mcp6231 1 2 3 C + 5 v dd v in C v out v ss v in + sot-23-5 4 1 2 3 + 5 v dd v out v ss mcp6231r sot-23-5 4 1 2 3 C + 5 v ss v in C v out v dd v in + mcp6231u sc70-5, sot-23-5 4 1 2 3 C + 5 v dd v out v in + v ss v in C v in + v in C mcp6231 v ss v dd v out 1 2 3 4 8 7 6 5 C + nc nc nc msop, pdip, soic mcp6232 msop, pdip, soic 1 2 3 4 8 7 6 5 - + - + v ina _ v ina + v ss v outa v outb v dd v inb _ v inb + mcp6234 v ina + v ina C v ss 1 2 3 4 14 13 12 11 - v outa + - + v dd v outd v ind C v ind + 10 9 8 5 6 7 v outb v inb C v inb + v inc + v inc C v outc + - - + pdip, soic, tssop mcp6231 dfn * mcp6232 v ina + v ina _ v ss v outb v inb _ 1 2 3 4 8 7 6 5 v inb + v outa ep 9 v dd v in + v in C v ss v dd v out 1 2 3 4 8 7 6 5 nc nc ep 9 nc * includes exposed thermal pad (ep); see table 3-1 . 2x3 tdfn * 20 a, 300 khz rail-to-rail op amp downloaded from: http:///
mcp6231/1r/1u/2/4 ds21881e-page 2 ? 2009 microchip technology inc. notes: downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 3 mcp6231/1r/1u/2/4 1.0 electrical characteristics absolute maximum ratings ? v dd Cv ss ........................................................................7.0v current at analog input pins (v in +, v in C).....................2 ma analog inputs (v in +, v in C) ?? ........ v ss C1.0vtov dd +1.0v all other inputs and outputs ......... v ss C 0.3v to v dd +0.3v difference input voltage ...................................... |v dd Cv ss | output short circuit current ................................ continuous current at output and supply pins ............................30 ma storage temperature ................................... C65c to +150c maximum junction temperature (t j )......................... .+150c esd protection on all pins (hbm; mm) .............. 4 kv; 300v ? notice: stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rati ng only and functional operation of the device at those or any other conditions above those indicated in the operational listi ngs of this specification is not implied. exposure to maximu m rating conditions for extended periods may affect device reliability. ?? see section 4.1.2 input voltage and current limits . dc electrical characteristics electrical characteristics: unless otherwise indicated, t a = +25c, v dd = +1.8v to +5.5v, v ss = gnd, v cm = v dd /2, r l = 100 k to v dd /2 and v out v dd /2. parameters sym min typ max units conditions input offset input offset voltage v os -5.0 +5.0 mv v cm = v ss extended temperature v os -7.0 +7.0 mv t a = -40c to +125c, v cm = v ss (note 1) input offset drift with temperature v os / t a 3 . 0 v / c t a = -40c to +125c, v cm = v ss power supply rejection ratio psrr 83 db v cm = v ss input bias current and impedance input bias current: i b 1.0 pa at temperature i b 2 0p a t a = +85c at temperature i b 1100 pa t a = +125c input offset current i os 1.0 pa common mode input impedance z cm 1 0 13 ||6 ||pf differential input impedance z diff 1 0 13 ||3 ||pf common mode common mode input range v cmr v ss C 0.3 v dd + 0.3 v common mode rejection ratio cmrr 61 75 db v cm = -0.3v to 5.3v, v dd = 5v open-loop gain dc open-loop gain (large signal) a ol 90 110 db v out = 0.3v to v dd C 0.3v, v cm =v ss output maximum output voltage swing v ol , v oh v ss + 35 v dd C 35 mv r l =10 k , 0.5v input overdrive output short-circuit current i sc 6m a v dd = 1.8v i sc 2 3m a v dd = 5.5v power supply supply voltage v dd 1.8 6.0 v quiescent current per amplifier i q 10 20 30 a i o = 0, v cm = v dd C 0.5v note 1: the sc70 package is only tested at +25c. 2: all parts with date codes february 2007 and later have been screened to ensure operation at v dd = 6.0v. however, the other minimum and maximum specifications are measured at 1.8v and 5.5v downloaded from: http:/// mcp6231/1r/1u/2/4 ds21881e-page 4 ? 2009 microchip technology inc. ac electrical characteristics temperature characteristics 1.1 test circuits the test circuits used for the dc and ac tests are shown in figure 1-1 and figure 1-1 . the bypass capacitors are laid out according to the rules discussed in section 4.6 pcb surface leakage . figure 1-1: ac and dc test circuit for most non-inverting gain conditions. figure 1-2: ac and dc test circuit for most inverting gain conditions. electrical characteristics: unless otherwise indicated, t a = +25c, v dd = +1.8 to 5.5v, v ss = gnd, v cm = v dd /2, v out v dd /2, r l = 100 k to v dd /2 and c l = 60 pf. parameters sym min typ max units conditions ac response gain bandwidth product gbwp 300 khz phase margin pm 65 g = +1 v/v slew rate sr 0.15 v/s noise input noise voltage e ni 6 . 0 v p-p f = 0.1 hz to 10 hz input noise voltage density e ni 5 2n v / hz f = 1 khz input noise current density i ni 0 . 6f a / hz f = 1 khz electrical characteristics: unless otherwise indicated, v dd = +1.8v to +5.5v and v ss = gnd. parameters sym min typ max units conditions temperature ranges extended temperature range t a -40 +125 c operating temperature range t a -40 +125 c note storage temperature range t a -65 +150 c thermal package resistances thermal resistance, 5l-sc70 ja 331 c/w thermal resistance, 5l-sot-23 ja 256 c/w thermal resistance, 8l-dfn ja 84.5 c/w thermal resistance, 8l-msop ja 2 0 6 c / w thermal resistance, 8l-tdfn ja 4 1 c / w thermal resistance, 8l-pdip ja 8 5 c / w thermal resistance, 8l-soic ja 1 6 3 c / w thermal resistance, 14l-pdip ja 7 0 c / w thermal resistance, 14l-soic ja 1 2 0 c / w thermal resistance, 14l-tssop ja 1 0 0 c / w note: the internal junction temperature (t j ) must not exceed the absolute maximum specification of +150c. v dd mcp623x r g r f r n v out v in v dd /2 1f c l r l v l 0.1 f v dd mcp623x r g r f r n v out v dd /2 v in 1f c l r l v l 0.1 f downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 5 mcp6231/1r/1u/2/4 2.0 typical performance curves note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +5.5v, v ss = gnd, v cm = v dd /2, v out v dd /2, r l = 100 k to v dd /2 and c l = 60 pf. figure 2-1: input offset voltage. figure 2-2: psrr, cmrr vs. frequency. figure 2-3: input bias current at +85c. figure 2-4: cmrr, psrr vs. ambient temperature. figure 2-5: open-loop gain, phase vs. frequency. figure 2-6: input bias current at +125c. note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purpose s only. the performance characteristics listed herein are not tested or guaranteed. in so me graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power suppl y range) and therefore outs ide the warranted range. 0% 2% 4% 6% 8% 10% 12% 14% 16% 18% 20% -5-4 -3 -2 -1 01 2 3 4 5 input offset voltage (mv) percentage of occurrences 630 samples v cm = v ss 20 30 40 50 60 70 80 90 100 1.e+01 1.e+02 1.e+03 1.e+04 1.e+05 frequency (hz) psrr, cmrr (db) 10 1k 10k 100k 100 psrr+ psrr- cmrr 0% 2% 4% 6% 8% 10% 12% 14% 16% 18% 20% 06 1218 24 30 36 42 input bias current (pa) percentage of occurrences 630 samples v cm = v dd /2 t a = +85c 70 75 80 85 90 -50 -25 0 25 50 75 100 125 ambient temperature (c) cmrr, psrr (db) psrr (v cm = v ss ) cmrr (v cm = -0.3v to +5.3v, v dd = 5.0v) -20 0 20 40 60 80 100 120 1.e- 01 1.e+ 00 1.e+ 01 1.e+ 02 1.e+ 03 1.e+ 04 1.e+ 05 1.e+ 06 1.e+ 07 frequency (hz) open-loop gain (db) -210 -180 -150 -120 -90 -60 -30 0 open-loop phase () r l = 10 k ? v cm = v dd /2 0.1 1 10 100 1k 10k 100k 1m 10m gain phase 0% 5% 10% 15% 20% 25% 30% 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 input bias current (na) percentage of occurrences 632 samples v cm = v dd /2 t a = +125c downloaded from: http:/// mcp6231/1r/1u/2/4 ds21881e-page 6 ? 2009 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +5.5v, v ss = gnd, v cm = v dd /2, v out v dd /2, r l = 100 k to v dd /2 and c l = 60 pf. figure 2-7: input noise voltage density vs. frequency. figure 2-8: input offset voltage vs. common mode input voltage at v dd = 1.8v. figure 2-9: input offset voltage vs. common mode input voltage at v dd = 5.5v. figure 2-10: input offset voltage drift. figure 2-11: input offset voltage vs. output voltage. figure 2-12: output short-circuit current vs. ambient temperature. 10 100 1,000 1.e-01 1.e+0 0 1.e+0 1 1.e+0 2 1.e+0 3 1.e+0 4 1.e+0 5 frequency (hz) input noise voltage density (nv/ hz) 0.1 100 1k 10k 100k 10 1 150 250 350 450 550 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 common mode input voltage (v) input offset voltage (v) v dd = 1.8v t a = -40c t a = +25c t a = +85c t a = +125c -200 -150 -100 -50 0 50 100 150 200 -0.5 0.00.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 common mode input voltage (v) input offset voltage (v) v dd = 5.5 v t a = +125c t a = +85c t a = +25c t a = -40c 0% 2% 4% 6% 8% 10% 12% 14% 16% 18% 20% -12 -10 -8-6 -4 -2 02 4 6 8 1012 input offset voltage drift (v/c) percentage of occurrences 628 samples v cm = v ss t a = -40c to +125c -300 -250 -200 -150 -100 -50 0 50 100 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 output voltage (v) input offset voltage (v) v dd = 1.8v v cm = v ss v dd = 5.5v -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 power supply voltage (v) output short-circuit current (ma) t a = +125c t a = +85c t a = +25c t a = -40c +i sc -i sc downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 7 mcp6231/1r/1u/2/4 note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +5.5v, v ss = gnd, v cm = v dd /2, v out v dd /2, r l = 100 k to v dd /2 and c l = 60 pf. figure 2-13: slew rate vs. ambient temperature. figure 2-14: output voltage headroom vs. output current magnitude. figure 2-15: maximum output voltage swing vs. frequency. figure 2-16: small-signal, non-inverting pulse response. figure 2-17: large-signal, non-inverting pulse response. figure 2-18: quiescent current vs. power supply voltage. 0.05 0.10 0.15 0.20 0.25 0.30 -50-25 0 255075100125 ambient temperature (c) slew rate (v/s) falling edge rising edge v dd = 1.8v v dd = 5.5v 1 10 100 1,000 1.e-02 1.e-01 1.e+00 1.e+01 output current magnitude (a) output voltage headroom (mv) v dd C v oh 10m 1m v ol C v ss 100 10 0.1 1 10 1.e+03 1.e+04 1.e+05 1.e+06 frequency (hz) max. output voltage swing (v p-p ) v dd = 5.5v v dd = 1.8v 1k 10k 100k 1m time (2 s/div) output voltage (10 mv/div) g = +1 v/v r l = 10 k ? 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 time (20 s/div) output voltage (v) v dd = 5.0v g = +1 v/v 0 5 10 15 20 25 30 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 power supply voltage (v) quiescent current per amplifier (a) v cm = 0.9v dd t a = +125c t a = +85c t a = +25c t a = -40c downloaded from: http:/// mcp6231/1r/1u/2/4 ds21881e-page 8 ? 2009 microchip technology inc. figure 2-19: measured input current vs. input voltage (below v ss ). figure 2-20: the mcp6231/1r/1u/2/4 show no phase reversal. 1.e-12 1.e-11 1.e-10 1.e-09 1.e-08 1.e-07 1.e-06 1.e-05 1.e-04 1.e-03 1.e-02 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 input voltage (v) input current magnitude (a) +125c +85c +25c -40c 10m 1m 100 10 1 100n 10n 1n 100p 10p 1p -1.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 time (1 ms/div) input, output voltages (v) v out v in v dd = 5.0v g = +2 v/v downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 9 mcp6231/1r/1u/2/4 3.0 pin descriptions descriptions of the pins are listed in table 3-1 (single op amps) and table 3-2 (dual and quad op amps). table 3-1: pin function table for single op amps table 3-2: pin function table for dual and quad op amps 3.1 analog outputs the output pins are low-impedance voltage sources. 3.2 analog inputs the non-inverting and inverting inputs are high-impedance cmos inputs with low bias currents. 3.3 power supply (v ss and v dd ) the positive power supply (v dd ) is 1.8v to 6.0v higher than the negative power supply (v ss ). for normal operation, the other pins are between v ss and v dd . typically, these parts are used in a single (positive) supply configuration. in this case, v ss is connected to ground and v dd is connected to the supply. v dd will need bypass capacitors. 3.4 exposed thermal pad (ep) there is an internal electrical connection between the exposed thermal pad (ep) and the v ss pin; they must be connected to the same potential on the printed circuit board (pcb). mcp6231 mcp6231r mcp6231u symbol description dfn, msop, pdip, soic sot-23-5 sot-23-5 sot-23-5 sc70 6114 v out analog output 2443v in C inverting input 3331v in + non-inverting input 7525v dd positive power supply 4252v ss negative power supply 1, 5, 8 nc no internal connection 9 ep exposed thermal pad (ep); must be connected to v ss . mcp6232 mcp6234 symbol description msop, pdip, soic, tdfn pdip, soic, tssop 11 v outa analog output (op amp a) 22 v ina C inverting input (op amp a) 33 v ina + non-inverting input (op amp a) 84 v dd positive power supply 55 v inb + non-inverting input (op amp b) 66 v inb C inverting input (op amp b) 77 v outb analog output (op amp b) 8 v outc analog output (op amp c) 9 v inc C inverting input (op amp c) 1 0 v inc + non-inverting input (op amp c) 41 1v ss negative power supply 1 2 v ind + non-inverting input (op amp d) 1 3 v ind C inverting input (op amp d) 1 4 v outd analog output (op amp d) 9 exposed thermal pad (ep); must be connected to v ss . downloaded from: http:/// mcp6231/1r/1u/2/4 ds21881e-page 10 ? 2009 microchip technology inc. notes: downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 11 mcp6231/1r/1u/2/4 4.0 application information the mcp6231/1r/1u/2/4 family of op amps is manufactured using microchips state-of-the-art cmos process and is specifically designed for low-cost, low-power and general-purpose applications. the low supply voltage, low quiescent current and wide bandwidth makes the mcp6231/1r/1u/2/4 ideal for battery-powered applications. 4.1 rail-to-rail inputs 4.1.1 phase reversal the mcp6231/1r/1u/2/4 op amp is designed to prevent phase reversal when the input pins exceed the supply voltages. figure 4-1 shows the input voltage exceeding the supply voltage without any phase reversal. figure 4-1: the mcp6231/1r/1u/2/4 show no phase reversal. 4.1.2 input voltage and current limits the esd protection on the inputs can be depicted as shown in figure 4-2 . this structure was chosen to protect the input transistors, and to minimize input bias current (i b ). the input esd diodes clamp the inputs when they try to go more than one diode drop below v ss . they also clamp any voltages that go too far above v dd ; their breakdown voltage is high enough to allow normal operation, and low enough to bypass quick esd events within the specified limits. figure 4-2: simplified analog input esd structures. in order to prevent damage and/or improper operation of these op amps, the circuit they are in must limit the currents and voltages at the v in + and v in C pins (see absolute maximum ratings ? at the beginning of section 1.0 electri cal characteristics ). figure 4-3 shows the recommended appr oach to protecting these inputs. the internal esd diodes prevent the input pins (v in + and v in C) from going too far below ground, and the resistors r 1 and r 2 limit the possible current drawn out of the input pins. diodes d 1 and d 2 prevent the input pins (v in + and v in C) from going too far above v dd , and dump any currents onto v dd . when implemented as shown, resistors r 1 and r 2 also limit the current through d 1 and d 2 . figure 4-3: protecting the analog inputs. it is also possible to connect the diodes to the left of resistors r 1 and r 2 . in this case, current through the diodes d 1 and d 2 needs to be limited by some other mechanism. the resistors th en serve as in-rush current limiters; the dc current into the input pins (v in + and v in C) should be very small. -1.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 time (1 ms/div) input, output voltages (v) v out v in v dd = 5.0v g = +2 v/v bond pad bond pad bond pad v dd v in + v ss input stage bond pad v in C v 1 mcp623x r 1 v dd d 1 r 1 > v ss C (minimum expected v 1 ) 2ma r 2 > v ss C (minimum expected v 2 ) 2ma v 2 r 2 d 2 r 3 downloaded from: http:/// mcp6231/1r/1u/2/4 ds21881e-page 12 ? 2009 microchip technology inc. a significant amount of cu rrent can flow out of the inputs when the common mode voltage (v cm ) is below ground (v ss ); see figure 2-19 . applications that are high impedance may need to limit the usable voltage range. 4.1.3 normal operation the input stage of the mcp6231/1r/1u/2/4 op amps use two differential cmos input stages in parallel. one operates at low common mode input voltage (v cm ), while the other operates at high v cm . with this topology, the device operates with v cm up to 0.3v above v dd and 0.3v below v ss . 4.2 rail-to-rail output the output voltage range of the mcp6231/1r/1u/2/4 op amps is v dd C 35 mv (maximum) and v ss + 35 mv (minimum) when r l =10k is connected to v dd /2 and v dd = 5.5v. refer to figure 2-14 for more information. 4.3 capacitive loads driving large capacitive loads can cause stability problems for voltage feedback op amps. as the load capacitance increases, the feedback loops phase margin decreases and the closed-loop bandwidth is reduced. this produces ga in peaking in the frequency response, with overshoot and ringing in the step response. a unity-gain buffer (g = +1) is the most sensitive to capacitive loads, but all gains show the same general behavior. when driving large capacitive loads with these op amps (e.g., > 60 pf when g = +1), a small series resistor at the output (r iso in figure 4-4 ) improves the feedback loops phase margin (stability) by making the output load resistive at higher frequencies. the bandwidth will be generally lower than the bandwidth with no capacitive load. figure 4-4: output resistor, r iso stabilizes large capacitive loads. figure 4-5 gives recommended r iso values for different capacitive loads and gains. the x-axis is the normalized load capacitance (c l /g n ), where g n is the circuits noise gain. for non-inverting gains, g n and the signal gain are equal. for inverting gains, g n is 1 + |signal gain| (e.g., C1 v/v gives g n = +2 v/v). figure 4-5: recommended r iso values for capacitive loads. after selecting r iso for your circuit, double-check the resulting frequency response peaking and step response overshoot. evaluation on the bench and simulations with the mcp6231/1r/1u/2/4 spice macro model are very helpful. modify r iso s value until the response is reasonable. 4.4 supply bypass with this op amp, the power supply pin (v dd for single-supply) should have a local bypass capacitor (i.e., 0.01 f to 0.1 f) within 2 mm for good high-frequency performance. it can use a bulk capacitor (i.e., 1 f or larger) within 100 mm to provide large, slow currents. this bulk capacitor can be shared with other nearby analog parts. 4.5 unused op amps an unused op amp in a quad package (mcp6234) should be configured as shown in figure 4-6 . both circuits prevent the output from toggling and causing crosstalk. circuit a can use any reference voltage between the supplies, provides a buffered dc voltage and minimizes the supply current draw of the unused op amp. circuit b minimizes the number of components, but may draw a little more supply current for the unused op amp. figure 4-6: unused op amps. v in r iso v out mcp623x c l C + 100 1,000 10,000 10 100 1000 10000 normalized load capacitance; c l /g n (f) recommended r iso ( ? ) g n = 1 v/v g n = 2 v/v g n 4 v/v 10p 100p 1n 10n 10k 1k 100 v dd v dd ? mcp6234 (a) ? mcp6234 (b) r 1 r 2 v dd v ref v ref v dd r 2 r 1 r 2 + -------------------- ? = downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 13 mcp6231/1r/1u/2/4 4.6 pcb surface leakage in applications where low input bias current is critical, printed circuit board (pcb) surface leakage effects need to be considered. surface leakage is caused by humidity, dust or other contamination on the board. under low humidity conditions, a typical resistance between nearby traces is 10 12 . a 5v difference would cause 5 pa of current to flow , which is greater than the mcp6231/1r/1u/2/4 familys bias current at +25c (1 pa, typical). the easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). the guard ring is biased at the same voltage as the sensitive pin. an example of this type of layout is shown in figure 4-7 . figure 4-7: example guard ring layout for inverting gain. 1. non-inverting gain and unity-gain buffer: a. connect the non-inverting pin (v in +) to the input with a wire that does not touch the pcb surface. b. connect the guard ring to the inverting input pin (v in C). this biases the guard ring to the common mode input voltage. 2. inverting gain and transimpedance amplifiers (convert current to voltage, such as photo detectors): a. connect the guard ring to the non-inverting input pin (v in +). this biases the guard ring to the same reference voltage as the op amp (e.g., v dd /2 or ground). b. connect the inverting pin (v in C) to the input with a wire that does not touch the pcb surface. 4.7 application circuits 4.7.1 matching the impedance at the inputs to minimize the effect of input bias current in an ampli- fier circuit (this is import ant for very high source- impedance applications, such as ph meters and transimpedance amplifiers), the impedances at the inverting and non-inverting inputs need to be matched. this is done by choosing the circuit resistor values so that the total resistance at each input is the same. figure 4-8 shows a summing amplifier circuit. figure 4-8: summing amplifier circuit. to match the inputs, set all voltage sources to ground and calculate the total resistance at the input nodes. in this summing amplifier circuit, the resistance at the inverting input is calculated by setting v in1 , v in2 and v out to ground. in this case, r g1 , r g2 and r f are in parallel. the total resistance at the inverting input is: equation 4-1: at the non-inverting input, v dd is the only voltage source. when v dd is set to ground, both r x and r y are in parallel. the total resistance at the non-inverting input is: equation 4-2: guard ring v ss v in Cv in + mcp623x v out v in2 C + v in1 r g2 r g1 r f r z v dd r x r y r vin C 1 1 r g1 --------- 1 r g2 --------- 1 r f ------ ++ ?? ?? ---------------------------------------------- = where: r vin C = total resistance at the inverting input r vin + 1 1 r x ------ 1 r y ----- - + ?? ?? ------------------------- -r z + = where: r vin + = total resistance at the inverting input downloaded from: http:/// mcp6231/1r/1u/2/4 ds21881e-page 14 ? 2009 microchip technology inc. to minimize output offset voltage and increase circuit accuracy, the resistor values need to meet the conditions: equation 4-3: 4.7.2 compensating for the parasitic capacitance in analog circuit design, t he pcb parasitic capacitance can compromise the circuit behavior; figure 4-9 shows a typical scenario. if the input of an amplifier sees parasitic capacitance of several picofarad (c para , which includes the common mode capacitance of 6 pf, typical), and large r f and r g , the frequency response of the circuit will include a zero. this parasitic zero introduces gain-peaking and can cause circuit instability. figure 4-9: effect of parasitic capacitance at the input. one solution is to use smalle r resistor values to push the zero to a higher frequency. another solution is to compensate by introducing a pole at the point at which the zero occurs. this can be done by adding c f in parallel with the feedback resistor (r f ). c f needs to be selected so that the ratio c para :c f is equal to the ratio of r f :r g . r vin + r vin C = v out c f v dc + C v ac r g r f c para c f c para r g r f ------ - ? = mcp623x downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 15 mcp6231/1r/1u/2/4 5.0 design aids microchip provides the basic design tools needed for the mcp6231/1r/1u/2/4 family of op amps. 5.1 spice macro model the latest spice macro model for the mcp6231/1r/ 1u/2/4 op amps is available on the microchip web site at www.microchip.com. this model is intended to be an initial design tool that works well in the op amps linear region of operation over t he temperature range. see the model file for information on its capabilities. bench testing is a very important part of any design and cannot be replaced with simulations. also, simulation results using this macro model need to be validated by comparing them to the data sheet specifications and characteristic curves. 5.2 filterlab ? software microchips filterlab ? software is an innovative software tool that simplifies analog active filter (using op amps) design. available at no cost from the microchip web site at www.m icrochip.com/filterlab, the filterlab design tool prov ides full schematic diagrams of the filter circuit with component values. it also outputs the filter circuit in spice format, which can be used with the macro model to simulate actual filter performance. 5.3 mindi? circuit designer & simulator microchips mindi? circuit designer & simulator aids in the design of various circuits useful for active filter, amplifier and power-management applications. it is a free online circuit designer & simulator available from the microchip web site at www.microchip.com/mindi. this interactive circuit designer & simulator enables designers to quickly generate circuit diagrams, simulate circuits. circuits developed using the mindi circuit designer & simulator can be downloaded to a personal computer or workstation. 5.4 microchip advanced part selector (maps) maps is a software tool that helps semiconductor professionals efficiently id entify microchip devices that fit a particular design requirement. available at no cost from the microchip web site at www.microchip.com/ maps, the maps is an overall selection tool for microchips product portfolio that includes analog, memory, mcus and dscs. using this tool you can define a filter to sort features for a parametric search of devices and export side-by-side technical comparison reports. helpful links are also provided for data sheets, purchase, and sampling of microchip parts. 5.5 analog demonstration and evaluation boards microchip offers a broad spectrum of analog demonstration and evaluat ion boards that are designed to help you achieve faster time to market. for a complete listing of these boards and their corresponding users guides and technical information, visit the microchi p web site at: www.microchip.com/analogtools two of our boards that are especially useful are: p/n soic8ev: 8-pin soic/msop/tssop/dip evaluation board p/n soic14ev: 14-pin soic/tssop/dip evaluation board 5.6 application notes the following microchip application notes are available on the microchip web site at www.microchip. com/appnotes and are recommended as supplemental reference resources. adn003: select the right operational amplifier for your filtering circuits, ds21821 an722: operational amplifier topologies and dc specifications, ds00722 an723: operational amplifier ac specifications and applications, ds00723 an884: driving capacitive loads with op amps, ds00884 an990: analog sensor conditioning circuits C an overview, ds00990 these application notes and others are listed in the design guide: signal chain design guide, ds21825 downloaded from: http:/// mcp6231/1r/1u/2/4 ds21881e-page 16 ? 2009 microchip technology inc. notes: downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 17 mcp6231/1r/1u/2/4 6.0 packaging information 6.1 package marking information 5-lead sc70 (mcp6231u only) example: 1 23 5 4 5-lead sot-23 example: xxnn 1 23 5 4 bj25 device code mcp6231 bjnn mcp6231 r bknn mcp6231 ub l n n note: applies to 5-lead sot-23. 8-lead msop example : xxxxxxywwnnn 6232e 929256 legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week 01) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part nu mber cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e xxnn as25 8-lead dfn (2 x 3) ( mcp6231 ) example: 8-lead tdfn (2 x 3) ( mcp6232 ) example: xxxyww nnn aer929 256 xxxyww nnn aae929 256 downloaded from: http:/// mcp6231/1r/1u/2/4 ds21881e-page 18 ? 2009 microchip technology inc. package marking information (continued) 14-lead pdip (300 mil) ( mcp6234 )e x a m p l e : 14-lead tssop ( mcp6234 ) example : 14-lead soic (150 mil) ( mcp6234 ) example: xxxxxxxxxxxxxx xxxxxxxxxxxxxx yywwnnn xxxxxxxxxx yywwnnn xxxxxxxx yyww nnn mcp6234 0929256 6234e 0929 256 xxxxxxxxxx mcp62340929256 e/p^^ e/sl^^ 3 e 3 e 8-lead soic (150 mil) example: xxxxxxxx xxxxyyww nnn mcp6232 e/sn0929 256 mcp6232 e sn 0929 256 or 3 e xxxxxxxxxxxxxnnn yyww 8-lead pdip (300 mil) example: mcp6232 e/p256 0929 mcp6232 e/p 256 0929 3 e or downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 19 mcp6231/1r/1u/2/4 !" ! #$! !% # $ !% # $ #&! ! !# "' ( )*+ ) # & #, $ --# $## . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / 3# 44" " 4 # 5 56 7 5$ 8 %1 5 ( 1# 9()* 6, : # ; < !!1 / / ; < # ! %% < 6, =!# " ; !!1 / =!# " ( ( ( 6, 4# ; ( . #4# 4 9 4 ! / ; < 9 4 !=!# 8 ( < d b 1 2 3 e1 e 4 5 ee c l a1 aa 2 - *9 ) downloaded from: http:/// mcp6231/1r/1u/2/4 ds21881e-page 20 ? 2009 microchip technology inc. . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 21 mcp6231/1r/1u/2/4 ! !" ! #$! !% # $ !% # $ #&! ! !# "' ( )*+ ) # & #, $ --# $## . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / 3# 44" " 4 # 5 56 7 5$ 8 %1 5 ( 4 !1# ()* 6$# !4 !1# )* 6, : # < ( !!1 / / ; < # ! %% < ( 6, =!# " < !!1 / =!# " < ; 6, 4# < . #4# 4 < 9 . # # 4 ( < ; . # > < > 4 ! / ; < 9 4 !=!# 8 < ( n b e e1 d 1 2 3 e e1 a a1 a2 c l l1 - * ) downloaded from: http:/// mcp6231/1r/1u/2/4 ds21881e-page 22 ? 2009 microchip technology inc. " # $ % &'() *!* +,-.#$ 1 , $ !&% #$ , 08$# $ #8 #!-# # # ! 1 / , & !#8 #! 1 / - $ #! !# "' ( )*+ ) # & #, $ --# $## ".+ % 0$ $ -# $## 0% % # $ . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / 3# 44" " 4 # 5 56 7 5$ 8 %1 5 ; 1# ()* 6, : # ; # ! %% ( * # # / ". 6, 4# )* 6, =!# " )* "& !1 !4# < (( "& !1 !=!# " ( < ( * # #=!# 8 ( * # #4# 4 ( * # ## "& !1 ! ? < < d n e note 1 1 2 exposed pad note 1 2 1 d2 k l e2 n e b a3 a1 a note 2 bottom view top view - * * downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 23 mcp6231/1r/1u/2/4 " # $ % &'() *!* +,-.#$ . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / downloaded from: http:/// mcp6231/1r/1u/2/4 ds21881e-page 24 ? 2009 microchip technology inc. " # $ % &'( ) *!* +-.#$ . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 25 mcp6231/1r/1u/2/4 " # $ % &'( ) *!* +-.#$ . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / downloaded from: http:/// mcp6231/1r/1u/2/4 ds21881e-page 26 ? 2009 microchip technology inc. " ( &'(( 1 , $ !&% #$ , 08$# $ #8 #!-# # # ! !" ! #$! !% # $ !% # $ #&! ( ! !# "' ( )*+ ) # & #, $ --# $## ".+ % 0$ $ -# $## 0% % # $ . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / 3# 44" " 4 # 5 56 7 5$ 8 %1 5 ; 1# 9()* 6, : # < < !!1 / / ( ;( ( # ! %% < ( 6, =!# " )* !!1 / =!# " )* 6, 4# )* . #4# 4 9 ; . # # 4 (". . # > < ;> 4 ! / ; < 4 !=!# 8 < d n e e1 note 1 1 2 e b a a1 a2 c l1 l - * ) downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 27 mcp6231/1r/1u/2/4 noe: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:/// mcp6231/1r/1u/2/4 ds21881e-page 28 ? 2009 microchip technology inc. " # / )! -. #/ 1 , $ !&% #$ , 08$# $ #8 #!-# # # ! @% #* # # !" ! #$! !% # $ !% # $ #&! a ! !# "' ( )*+) # & #, $ --# $## . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / 3# 5*:" 4 # 5 56 7 5$ 8 %1 5 ; 1# )* # #1 < < !!1 / / ( ( ) # #1 ( < < $! # $! =!# " ( !!1 / =!# " ( ; 6, 4# ; 9( # #1 4 ( ( 4 ! / ; ( 3 4 !=!# 8 9 4 - 4 !=!# 8 ; 6, - @ ) < < n e1 note 1 d 12 3 a a1 a2 l b1 b e e eb c - * ;) downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 29 mcp6231/1r/1u/2/4 " ) 0%!+, -./ 1 , $ !&% #$ , 08$# $ #8 #!-# # # ! @% #* # # !" ! #$! !% # $ !% # $ #&! ( ! !# "' ( )*+ ) # & #, $ --# $## ".+ % 0$ $ -# $## 0% % # $ . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / 3# 44" " 4 # 5 56 7 5$ 8 %1 5 ; 1# )* 6, : # < < ( !!1 / / ( < < # ! %% @ < ( 6, =!# " 9)* !!1 / =!# " )* 6, 4# )* * % b # c ( < ( . #4# 4 < . # # 4 ". . # > < ;> 4 ! / < ( 4 !=!# 8 < ( ! %# (> < (> ! %#) ## (> < (> d n e e e1 note 1 12 3 b a a1 a2 l l1 c h h - *() downloaded from: http:/// mcp6231/1r/1u/2/4 ds21881e-page 30 ? 2009 microchip technology inc. " ) 0%!+, -./ . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 31 mcp6231/1r/1u/2/4 12 # / )! -. #/ 1 , $ !&% #$ , 08$# $ #8 #!-# # # ! @% #* # # !" ! #$! !% # $ !% # $ #&! a ! !# "' ( )*+) # & #, $ --# $## . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / 3# 5*:" 4 # 5 56 7 5$ 8 %1 5 1# )* # #1 < < !!1 / / ( ( ) # #1 ( < < $! # $! =!# " ( !!1 / =!# " ( ; 6, 4# ( ( ( # #1 4 ( ( 4 ! / ; ( 3 4 !=!# 8 ( 9 4 - 4 !=!# 8 ; 6, - @ ) < < n e1 d note 1 12 3 e c eb a2 l a a1 b1 be - *() downloaded from: http:/// mcp6231/1r/1u/2/4 ds21881e-page 32 ? 2009 microchip technology inc. 12 ) 0%!+, -./ 1 , $ !&% #$ , 08$# $ #8 #!-# # # ! @% #* # # !" ! #$! !% # $ !% # $ #&! ( ! !# "' ( )*+ ) # & #, $ --# $## ".+ % 0$ $ -# $## 0% % # $ . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / 3# 44" " 4 # 5 56 7 5$ 8 %1 5 1# )* 6, : # < < ( !!1 / / ( < < # ! %%@ < ( 6, =!# " 9)* !!1 / =!# " )* 6, 4# ;9()* * % b # c ( < ( . #4# 4 < . # # 4 ". . # > < ;> 4 ! / < ( 4 !=!# 8 < ( ! %# (> < (> ! %#) ## (> < (> note 1 n d e e1 1 23 b e a a1 a2 l l1 c h h - *9() downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 33 mcp6231/1r/1u/2/4 . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / downloaded from: http:/// mcp6231/1r/1u/2/4 ds21881e-page 34 ? 2009 microchip technology inc. 12 3 3 & )2+2-. 1 , $ !&% #$ , 08$# $ #8 #!-# # # ! !" ! #$! !% # $ !% # $ #&! ( ! !# "' ( )*+ ) # & #, $ --# $## ".+ % 0$ $ -# $## 0% % # $ . # #$ # / ! - 0 # 1 / % # #! # ## +22--- 2 / 3# 44" " 4 # 5 56 7 5$ 8 %1 5 1# 9()* 6, : # < < !!1 / / ; ( # ! %% ( < ( 6, =!# " 9)* !!1 / =!# " ( !!1 / 4# ( ( . #4# 4 ( 9 ( . # # 4 ". . # > < ;> 4 ! / < 4 !=!# 8 < note 1 d n e e1 1 2 e b c a a1 a2 l1 l - *;) downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 35 mcp6231/2/4 appendix a: revision history revision e (august 2009) the following is the list of modifications: 1. added the 2x3 tdfn package for mcp6232. 2. updated the 2x3 dfn package information for mcp6231. 3. updated the temperature characteristics table. 4. updated section 3.0 pin descriptions . 5. updated the package outline drawings in section 6.0 packaging information . 6. updated the product identification systems section. revision d (may 2008) the following is the list of modifications: 1. changed heading available tools to design aids. 2. design aids: name change for mindi simulator tool. 3. package types: added dfn to mcp6231 device. 4. absolute maximum ratings: numerous changes in this section. 5. updated notes to section 1.0 electrical characteristics . 6. added test circuits to section 1.0 electrical characteristics . 7. corrected figure 2-7. 8. added figure 2-19 . 9. numerous changes to section 3.0 pin descriptions . 10. added section 4.1.1 phase reversal , section 4.1.2 input voltage and current limits , and section 4.1.3 normal operation . 11. replaced section 5.0 design aids with additional information. 12. updated section 6.0 packaging information with updated package outline drawings. revision c (march 2005) the following is the list of modifications: 1. added the mcp6234 quad op amp. 2. corrected plots in section 2.0 typical performance curves . 3. added section 3.0 pin descriptions . 4. added new sc-70 package markings. added pdip-14, soic-14, and tssop-14 packages and corrected package marking information ( section 6.0 packaging information ). 5. added appendix a: revision history . revision b (august 2004) undocumented changes. revision a (march 2004) original release of this document. downloaded from: http:/// mcp6231/2/4 ds21881e-page 36 ? 2009 microchip technology inc. notes: downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 37 mcp6231/2/4 product identification system to order or obtain information, e.g., on pricing or de livery, refer to the factory or the listed sales office . device: mcp6231: single op amp (msop, pdip, soic) mcp6231t: single op amp (tape and reel) (msop, soic, sot-23) mcp6231rt: single op amp (tape and reel) (sot-23) mcp6231ut: single op amp (tape and reel) (sc70, sot-23, tdfn) mcp6232: dual op amp mcp6232t: dual op amp (tape and reel) (msop, soic) mcp6234: quad op amp mcp6234t: quad op amp (tape and reel) (tssop, soic) temperature range: e = -40 c to +125 c package: lt = plastic package (sc70), 5-lead (mcp6231u only) mc = plastic dual flat no-lead (dfn) 2x3, 8-lead (mcp6231 only) mny= plastic dual flat no-lead (tdfn) 2x3, 8-lead (mcp6232 only) ms = plastic micro small outline (msop), 8-lead p = plastic dip (300 mil body), 8-lead, 14-lead ot = plastic small outline transistor (sot-23), 5-lead (mcp6231, mcp6231r, mcp6231u) sn = plastic soic (150 mil body), 8-lead sl = plastic soic (150 mil body), 14-lead st = plastic tssop (4.4 mil body), 14-lead part no. - x /xx package temperature range device examples: a) mcp6231-e/mc: extended temperature 8ld dfn package. b) mcp6231-e/ms: extended temperature 8ld msop package. c) mcp6231ut-e/lt: tape and reel, extended temperature 5ld sc70 package. d) mcp6231-e/p: extended temperature 8ld pdip package. e) mcp6231rt-e/ot: tape and reel, extended temperature 5ld sot-23 package f) mcp6231ut-e/ot: tape and reel, extended temperature 5ld sot-23. g) mcp6231-e/sn: extended temperature 8ld soic package. a) mcp6232-e/sn: extended temperature 8ld soic package. b) mcp6232-e/ms: extended temperature 8ld msop package. c) mcp6232-e/p: extended temperature 8ld pdip package. d) mcp6232t-e/sn: tape and reel, extended temperature 8ld soic package. e) mcp6232t-e/mny: tape and reel, extended temperature 8ld tdfn package. a) mcp6234-e/p: extended temperature 14ld pdip package. b) mcp6234-e/sl: extended temperature 14ld soic package. c) mcp6234-e/st: extended temperature, 14ld tssop package d) mcp6234t-e/sl: tape and reel, extended temperature 14ld soic package. e) mcp6234t-e/st: tape and reel, extended temperature 14ld tssop package. x tape and reel alternate pinout and/or downloaded from: http:/// mcp6231/2/4 ds21881e-page 38 ? 2009 microchip technology inc. notes: downloaded from: http:/// ? 2009 microchip technology inc. ds21881e-page 39 information contained in this publication regarding device applications and the like is prov ided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application me ets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safe ty applications is entirely at the buyers risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting fr om such use. no licenses are conveyed, implicitly or ot herwise, under any microchip intellectual property rights. trademarks the microchip name and logo, th e microchip logo, dspic, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, rfpic and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mxdev, mxlab, seeval and the embedded control solutions company are register ed trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, application maestro, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, mtouch, octopus, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, pic 32 logo, real ice, rflab, select mode, total endurance, tsharc, uniwindr iver, wiperlock and zena are trademarks of microchip te chnology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2009, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the code protection feature on microchip devices: microchip products meet the specification cont ained in their particular microchip data sheet. microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. there are dishonest and possibly illegal meth ods used to breach the code protection fe ature. all of these methods, to our knowledge, require using the microchip products in a manner outside the operating specif ications contained in microchips data sheets. most likely, the person doing so is engaged in theft of intellectual property. microchip is willing to work with the customer who is concerned about the integrity of their code. neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as unbreakable. code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchips c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your softwa re or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the companys quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperi pherals, nonvolatile memory and analog products. in addition, microchips quality system for the design and manufacture of development systems is iso 9001:2000 certified. downloaded from: http:/// ds21881e-page 40 ? 2009 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: http://support.microchip.com web address: www.microchip.com atlanta duluth, ga tel: 678-957-9614 fax: 678-957-1455 boston westborough, ma tel: 774-760-0087 fax: 774-760-0088 chicago itasca, il tel: 630-285-0071 fax: 630-285-0075 cleveland independence, oh tel: 216-447-0464 fax: 216-447-0643 dallas addison, tx tel: 972-818-7423 fax: 972-818-2924 detroit farmington hills, mi tel: 248-538-2250 fax: 248-538-2260 kokomo kokomo, in tel: 765-864-8360 fax: 765-864-8387 los angeles mission viejo, ca tel: 949-462-9523 fax: 949-462-9608 santa clara santa clara, ca tel: 408-961-6444 fax: 408-961-6445 toronto mississauga, ontario, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific asia pacific office suites 3707-14, 37th floor tower 6, the gateway harbour city, kowloon hong kong tel: 852-2401-1200 fax: 852-2401-3431 australia - sydney tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing tel: 86-10-8528-2100 fax: 86-10-8528-2104 china - chengdu tel: 86-28-8665-5511 fax: 86-28-8665-7889 china - hong kong sar tel: 852-2401-1200 fax: 852-2401-3431 china - nanjing tel: 86-25-8473-2460 fax: 86-25-8473-2470 china - qingdao tel: 86-532-8502-7355 fax: 86-532-8502-7205 china - shanghai tel: 86-21-5407-5533 fax: 86-21-5407-5066 china - shenyang tel: 86-24-2334-2829 fax: 86-24-2334-2393 china - shenzhen tel: 86-755-8203-2660 fax: 86-755-8203-1760 china - wuhan tel: 86-27-5980-5300 fax: 86-27-5980-5118 china - xiamen tel: 86-592-2388138 fax: 86-592-2388130 china - xian tel: 86-29-8833-7252 fax: 86-29-8833-7256 china - zhuhai tel: 86-756-3210040 fax: 86-756-3210049 asia/pacific india - bangalore tel: 91-80-3090-4444 fax: 91-80-3090-4080 india - new delhi tel: 91-11-4160-8631 fax: 91-11-4160-8632 india - pune tel: 91-20-2566-1512 fax: 91-20-2566-1513 japan - yokohama tel: 81-45-471- 6166 fax: 81-45-471-6122 korea - daegu tel: 82-53-744-4301 fax: 82-53-744-4302 korea - seoul tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 malaysia - kuala lumpur tel: 60-3-6201-9857 fax: 60-3-6201-9859 malaysia - penang tel: 60-4-227-8870 fax: 60-4-227-4068 philippines - manila tel: 63-2-634-9065 fax: 63-2-634-9069 singapore tel: 65-6334-8870 fax: 65-6334-8850 taiwan - hsin chu tel: 886-3-6578-300 fax: 886-3-6578-370 taiwan - kaohsiung tel: 886-7-536-4818 fax: 886-7-536-4803 taiwan - taipei tel: 886-2-2500-6610 fax: 886-2-2508-0102 thailand - bangkok tel: 66-2-694-1351 fax: 66-2-694-1350 europe austria - wels tel: 43-7242-2244-39 fax: 43-7242-2244-393 denmark - copenhagen tel: 45-4450-2828 fax: 45-4485-2829 france - paris tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany - munich tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy - milan tel: 39-0331-742611 fax: 39-0331-466781 netherlands - drunen tel: 31-416-690399 fax: 31-416-690340 spain - madrid tel: 34-91-708-08-90 fax: 34-91-708-08-91 uk - wokingham tel: 44-118-921-5869 fax: 44-118-921-5820 w orldwide s ales and s ervice 03/26/09 downloaded from: http:/// |
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